The present invention relates to a micro DC-DC converter and to such a micro electric power converter formed of a semiconductor integrated circuit (hereinafter referred to as an “IC”) and passive component parts such as a coil, a capacitor, and a resistor.
Recently, the popularity of hand held devices has become widespread. Many of the hand held devices use a cell for the electric power source thereof, and incorporate a DC-DC converter and such an electric power converter therein. Usually, the electric power converter, including active devices such as switching devices and a control IC, and passive individual component parts such as a coil, a transformer, a rectifier, a capacitor, and a resistor, is configured as a hybrid module, and is mounted on a printed circuit board such as a ceramic board and a plastic board.
FIG. 4 is a block circuit diagram of a conventional DC-DC converter. In FIG. 4, the conventional DC-DC converter circuit on a printed circuit board 61 is enclosed by the outermost dotted frame.
Referring now to FIG. 4, the DC-DC converter includes an input capacitor Ci, an output capacitor Co, a thin film magnetic induction element (thin film inductor) L, a control circuit 64, MOSFETs 66, and a driver 65 for driving MOSFETs 66. An electric power supply IC, including control circuit 64, MOSFETs 66, and driver 65 for driving MOSFETs 66, is formed in a semiconductor chip 63. Thin film magnetic induction element L is formed on a ferrite substrate 62. Semiconductor chip 63 is fixed onto ferrite substrate 62 via stud bumps (not shown). Input capacitor Ci, output capacitor Co, and ferrite substrate 62 are mounted on printed circuit board 61.
As a DC input voltage Vi is inputted to the DC-DC converter, driver 65 switches on and off MOSFETs 66 with the signal therefrom, and the DC-DC converter outputs a predetermined DC output voltage Vo. Thin film induction element L and output capacitor Co constitute a filter circuit for outputting the DC voltage Vo.
FIG. 5 is a detailed block circuit diagram of FIG. 4. Referring now to FIG. 5, control circuit 64 includes a UVLO circuit 71 that stops the DC-DC converter when the power supply voltage is low; an oscillator circuit (hereinafter referred to as an “OSC circuit”) 72 that transmits a triangular wave or a sawtooth wave to a PWM comparator 74, which transmits a signal to driver circuit 65; a reference voltage circuit (hereinafter referred to as a “Vref circuit”) 73; a timer latch circuit 75 that stops the DC-DC converter when an over voltage is caused; an error amplifying circuit (hereinafter referred to as an “ErrAmp circuit”) 76 for keeping a certain output voltage; a CR circuit formed of a capacitor CPC, and a resistor RPC; a resistance circuit, formed of resistors RFBO and RFBI, that feeds back the output voltage; and a level shift and enable control circuit (hereinafter referred to simply as a “logic circuit”) 77 that controls level shift and circuit interruption.
In control circuit 64, the signal from PWM comparator 74 is received by driver circuit 65. MOSFETs 66 are switched on and off with the signal from driver circuit 65. And, the output from MOSFETs 66 is outputted from a terminal OUT (an OUT terminal).
The DC-DC converter is mounted on printed circuit board 61. In FIG. 5, among the terminals for exchanging signals between semiconductor chip 63 and printed circuit board 61, a CE terminal is an input terminal for inputting digital signals to logic circuit 77 and an AL terminal is an output terminal for outputting digital signals from logic circuit 77. Among the terminals for exchanging signals, a control power supply terminal VDD (a VDD terminal), a control signal ground terminal CGND (a CGND terminal), an output terminal FB (an FB terminal) for ErrAmp circuit 76, an input terminal IN (an IN terminal) for ErrAmp circuit 76, a power ground terminal PGND (a PGND terminal), output terminals OUT (a first OUT terminal and a second OUT terminal), and a power supply terminal PVDD (a PVDD terminal) for power feed are analog signal terminals. (In the drawing figures, the word “terminal” is not used for the reference symbols.)
The terminals described above are arranged on the perimeter portion of ferrite substrate 62. The signals from printed circuit board 61 are transmitted to control circuit 64 formed in semiconductor chip 63 via the terminals formed on ferrite substrate 62.
As the demand for reducing the size and weight of the various hand held devices increases, there is also a strong demand to reduce the size of the electric power converters incorporated in the hand held devices. Downsizing of the hybrid power supply module is promoted by the advancements in the multi-chips-module (MCM) technology and the laminate ceramic component parts technology. However, since these technologies mount discrete component parts on a base board, it is limited to narrowing the mounting area for the power supply module. Especially, since the magnetic induction component parts such as inductors and transformers are much more bulky than the integrated circuit, the magnetic induction parts represent the greatest challenge for down-sizing the hand held devices.
Recently, planar-type thin film magnetic induction elements (solenoids), which meet the demands for reducing the size of the thin film magnetic component parts, have been reported. See, e.g., JP 2004-274004 A (and its FIG. 1) and JP 2004-72815 A (and its FIG. 3). Each of the thin film magnetic induction elements reported is almost the same in size as a semiconductor chip, and is mounted on the semiconductor chip. The techniques described in JP 2004-274004 A and JP 2004-72815 A facilitate thinning the magnetic induction elements and reducing the mounting area thereof. The thin film magnetic induction element (solenoid) disclosed in JP 2004-274004 A will be described below.
FIG. 6 is a top plan view of a conventional thin film magnetic induction element. The conventional thin film magnetic induction element is formed of ferrite substrate 62; coil conductors 3, 4, and 5 constituting a solenoid coil formed across ferrite substrate 62; first OUT terminal (terminal 21) connected to coil conductor 4; second OUT terminal (terminal 22) connected to coil conductor 4; and terminals 51 through 60 formed in the perimeter portion of ferrite substrate 62. Terminals 51 through 60 are allotted at random to the terminals for exchanging signals between printed circuit board 61 and semiconductor chip 63. In detail, terminal 57 is allotted to VDD terminal, terminal 58 to CGND terminal, terminal 54 to FB terminal, terminal 55 to IN terminal, terminal 56 to PGND terminal, terminal 60 to PVDD terminal, terminal 53 to PGND terminal, terminal 52 to CE terminal, and terminal 51 to AL terminal. Via these terminals, signals are exchanged between printed circuit board 61 and control circuit 64 formed in semiconductor chip 63.
JP 2004-72815 A discloses a thin film magnetic induction element formed of a toroidal solenoid coil. The thin film magnetic induction element disclosed in JP 2004-72815 A facilitates narrowing the mounting area and improving the electric power conversion efficiency.
The planar magnetic flux density distribution in the ferrite substrate of the thin film magnetic induction element shown in FIG. 6 is simulated. The simulation conditions include the area of ferrite substrate 62, the thickness of ferrite substrate 62, and a current I made to flow through a coil. The area of ferrite substrate 62 is set at 3.5 mm□. The thickness of ferrite substrate 62 is set at 525 μm. The current I is set at 300 mA.
Although the simulated magnetic flux density distribution is not illustrated, the areas where the magnetic flux density is high, and the areas where the magnetic flux density is low, are indicated in FIG. 7. The simulation results indicate that the magnetic flux density is high in the areas A extending in the longitudinal direction of the coil (X-direction) and the magnetic flux density is low in the areas B extending in perpendicular to the longitudinal direction of the coil (Y-direction). The magnetic flux density is high in the areas A extending in the longitudinal direction of the coil presumably because the magnetic flux components flowing through the gaps between adjacent conductors 3 to ferrite substrate 62 outside the coil are added to the magnetic flux flowing through the inside of the coil and, then, to ferrite substrate 62 outside the coil.
A voltage is induced in terminals 21, 22, 51 through 60 crossing the magnetic flux by the mutual inductance. Since the induced voltages are superimposed onto the signal as noises, large noises are caused in terminals 21, 22, 51 through 60 in the areas A, where the magnetic flux density is high. The large noises further cause a malfunction of the circuit. Circuit malfunction is more likely to be caused when the noises are superimposed onto an analog signal than when the noises are superimposed onto a digital signal. Especially when the noises are superimposed on a VDD terminal, a CGND terminal, and an IN terminal, circuit malfunction very often results.
In the conventional thin film magnetic induction element, the VDD terminal, the CGND terminal, the IN terminal for inputting the control input signal and such analog signals, the CE terminal for digital signal input, and the AL terminal for digital signal output are arranged at random on the perimeter portion of ferrite substrate 62. Circuit malfunctions are caused by positioning the terminals most adversely affected by the noises, such as the VDD terminal, the CGND terminal, and the IN terminal in the areas A, where the magnetic flux density is high.
In FIG. 7, the VDD terminal and the CGND terminal are allotted respectively to terminals 57 and 58, where the magnetic flux density is high, thereby causing circuit malfunctions due to the noise. Especially when ferrite substrate 62 is small, or the current made to flow through the coil is high, the magnetic flux density is high, thereby causing circuit malfunctions.
In view of the foregoing, it would be desirable to obviate the problems described above. It would also be desirable to provide a micro electric power converter that causes hardly any circuit malfunction.
Further objects and advantages of the invention will be apparent from the following description of the invention and the associated drawings.